11 research outputs found
Speeding up a scalable modular inversion hardware architecture
The modular inversion is a fundamental process in several cryptographic systems.
It can be computed in software or hardware, but hardware computation proven to be
faster and more secure. This research focused on improving an old scalable inversion
hardware architecture proposed in 2004 for finite field GF(p). The architecture has
been made of two parts, a computing unit and a memory unit. The memory unit is to
hold all the data bits of computation whereas the computing unit performs all the
arithmetic operations in word (digit) by word bases known as scalable method.
The main objective of this project was to investigate the cost and benefit of
modifying the memory unit to include parallel shifting, which was one of the tasks of
the scalable computing unit. The study included remodeling the entire hardware
architecture removing the shifter from the scalable computing part embedding it in
the memory unit instead. This modification resulted in a speedup to the complete
inversion process with an area increase due to the new memory shifting unit.
Quantitative measurements of the speed area trade-off have been investigated. The
results showed that the extra hardware to be added for this modification compared to
the speedup gained, giving the user the complete picture to choose from depending on
the application need.the British council in Saudi Arabia, KFUPM, Dr. Tatiana Kalganova at the Electrical &
Computer Engineering Department of Brunel University in Uxbridg
Scalable VLSI design for fast GF (p) montgomery inverse computation
This paper accelerates a scalable GF(p) Montgomery inversion hardware. The hardware is made of two parts a memory and a computing unit. We modified the original memory unit to include parallel shifting of all bits which was a task handled by the computing unit. The new hardware modeling, simulating, and synthesizing is performed through VHDL for several 160-bits designs showing interesting speedup to the inverse computation.British council in Saudi Arabia, KFUPM, Electrical & Computer Engineering Department of Brunel University in Uxbridg